7#ifndef SECP256K1_SCALAR_REPR_IMPL_H
8#define SECP256K1_SCALAR_REPR_IMPL_H
16#define SECP256K1_N_0 ((uint64_t)0xBFD25E8CD0364141ULL)
17#define SECP256K1_N_1 ((uint64_t)0xBAAEDCE6AF48A03BULL)
18#define SECP256K1_N_2 ((uint64_t)0xFFFFFFFFFFFFFFFEULL)
19#define SECP256K1_N_3 ((uint64_t)0xFFFFFFFFFFFFFFFFULL)
22#define SECP256K1_N_C_0 (~SECP256K1_N_0 + 1)
23#define SECP256K1_N_C_1 (~SECP256K1_N_1)
24#define SECP256K1_N_C_2 (1)
27#define SECP256K1_N_H_0 ((uint64_t)0xDFE92F46681B20A0ULL)
28#define SECP256K1_N_H_1 ((uint64_t)0x5D576E7357A4501DULL)
29#define SECP256K1_N_H_2 ((uint64_t)0xFFFFFFFFFFFFFFFFULL)
30#define SECP256K1_N_H_3 ((uint64_t)0x7FFFFFFFFFFFFFFFULL)
48 return (a->
d[offset >> 6] >> (offset & 0x3F)) & ((((uint64_t)1) <<
count) - 1);
54 if ((offset +
count - 1) >> 6 == offset >> 6) {
58 return ((a->
d[offset >> 6] >> (offset & 0x3F)) | (a->
d[(offset >> 6) + 1] << (64 - (offset & 0x3F)))) & ((((uint64_t)1) <<
count) - 1);
114 volatile int vflag = flag;
116 bit += ((uint32_t) vflag - 1) & 0x100;
136 r->
d[0] = (uint64_t)b32[31] | (uint64_t)b32[30] << 8 | (uint64_t)b32[29] << 16 | (uint64_t)b32[28] << 24 | (uint64_t)b32[27] << 32 | (uint64_t)b32[26] << 40 | (uint64_t)b32[25] << 48 | (uint64_t)b32[24] << 56;
137 r->
d[1] = (uint64_t)b32[23] | (uint64_t)b32[22] << 8 | (uint64_t)b32[21] << 16 | (uint64_t)b32[20] << 24 | (uint64_t)b32[19] << 32 | (uint64_t)b32[18] << 40 | (uint64_t)b32[17] << 48 | (uint64_t)b32[16] << 56;
138 r->
d[2] = (uint64_t)b32[15] | (uint64_t)b32[14] << 8 | (uint64_t)b32[13] << 16 | (uint64_t)b32[12] << 24 | (uint64_t)b32[11] << 32 | (uint64_t)b32[10] << 40 | (uint64_t)b32[9] << 48 | (uint64_t)b32[8] << 56;
139 r->
d[3] = (uint64_t)b32[7] | (uint64_t)b32[6] << 8 | (uint64_t)b32[5] << 16 | (uint64_t)b32[4] << 24 | (uint64_t)b32[3] << 32 | (uint64_t)b32[2] << 40 | (uint64_t)b32[1] << 48 | (uint64_t)b32[0] << 56;
147 bin[0] = a->
d[3] >> 56; bin[1] = a->
d[3] >> 48; bin[2] = a->
d[3] >> 40; bin[3] = a->
d[3] >> 32; bin[4] = a->
d[3] >> 24; bin[5] = a->
d[3] >> 16; bin[6] = a->
d[3] >> 8; bin[7] = a->
d[3];
148 bin[8] = a->
d[2] >> 56; bin[9] = a->
d[2] >> 48; bin[10] = a->
d[2] >> 40; bin[11] = a->
d[2] >> 32; bin[12] = a->
d[2] >> 24; bin[13] = a->
d[2] >> 16; bin[14] = a->
d[2] >> 8; bin[15] = a->
d[2];
149 bin[16] = a->
d[1] >> 56; bin[17] = a->
d[1] >> 48; bin[18] = a->
d[1] >> 40; bin[19] = a->
d[1] >> 32; bin[20] = a->
d[1] >> 24; bin[21] = a->
d[1] >> 16; bin[22] = a->
d[1] >> 8; bin[23] = a->
d[1];
150 bin[24] = a->
d[0] >> 56; bin[25] = a->
d[0] >> 48; bin[26] = a->
d[0] >> 40; bin[27] = a->
d[0] >> 32; bin[28] = a->
d[0] >> 24; bin[29] = a->
d[0] >> 16; bin[30] = a->
d[0] >> 8; bin[31] = a->
d[0];
154 return (a->
d[0] | a->
d[1] | a->
d[2] | a->
d[3]) == 0;
175 return ((a->
d[0] ^ 1) | a->
d[1] | a->
d[2] | a->
d[3]) == 0;
193 volatile int vflag = flag;
194 uint64_t mask = -vflag;
209 return 2 * (mask == 0) - 1;
215#define muladd(a,b) { \
218 secp256k1_uint128 t; \
219 secp256k1_u128_mul(&t, a, b); \
220 th = secp256k1_u128_hi_u64(&t); \
221 tl = secp256k1_u128_to_u64(&t); \
227 VERIFY_CHECK((c1 >= th) || (c2 != 0)); \
231#define muladd_fast(a,b) { \
234 secp256k1_uint128 t; \
235 secp256k1_u128_mul(&t, a, b); \
236 th = secp256k1_u128_hi_u64(&t); \
237 tl = secp256k1_u128_to_u64(&t); \
242 VERIFY_CHECK(c1 >= th); \
255#define sumadd_fast(a) { \
258 VERIFY_CHECK((c1 != 0) | (c0 >= (a))); \
259 VERIFY_CHECK(c2 == 0); \
263#define extract(n) { \
271#define extract_fast(n) { \
275 VERIFY_CHECK(c2 == 0); \
281 uint64_t m0, m1, m2, m3, m4, m5, m6;
282 uint64_t p0, p1, p2, p3, p4;
285 __asm__ __volatile__(
287 "movq 32(%%rsi), %%r11\n"
288 "movq 40(%%rsi), %%r12\n"
289 "movq 48(%%rsi), %%r13\n"
290 "movq 56(%%rsi), %%r14\n"
292 "movq 0(%%rsi), %%r8\n"
294 "xorq %%r10, %%r10\n"
304 "addq 8(%%rsi), %%r9\n"
310 "adcq %%rdx, %%r10\n"
316 "adcq %%rdx, %%r10\n"
322 "addq 16(%%rsi), %%r10\n"
328 "addq %%rax, %%r10\n"
334 "addq %%rax, %%r10\n"
338 "addq %%r11, %%r10\n"
343 "xorq %%r10, %%r10\n"
345 "addq 24(%%rsi), %%r8\n"
371 "adcq %%rdx, %%r10\n"
380 "addq %%r14, %%r10\n"
386 :
"=&g"(m0),
"=&g"(m1),
"=&g"(m2),
"=g"(m3),
"=g"(m4),
"=g"(m5),
"=g"(m6)
388 :
"rax",
"rdx",
"r8",
"r9",
"r10",
"r11",
"r12",
"r13",
"r14",
"cc");
391 __asm__ __volatile__(
399 "xorq %%r10, %%r10\n"
415 "adcq %%rdx, %%r10\n"
421 "adcq %%rdx, %%r10\n"
433 "addq %%rax, %%r10\n"
439 "addq %%rax, %%r10\n"
443 "addq %%r11, %%r10\n"
465 :
"=&g"(p0),
"=&g"(p1),
"=&g"(p2),
"=g"(p3),
"=g"(p4)
467 :
"rax",
"rdx",
"r8",
"r9",
"r10",
"r11",
"r12",
"r13",
"cc");
470 __asm__ __volatile__(
480 "movq %%rax, 0(%q6)\n"
493 "movq %%r8, 8(%q6)\n"
502 "movq %%r9, 16(%q6)\n"
508 "movq %%r8, 24(%q6)\n"
513 :
"rax",
"rdx",
"r8",
"r9",
"r10",
"cc",
"memory");
516 uint64_t c, c0, c1, c2;
517 uint64_t n0 = l[4], n1 = l[5], n2 = l[6], n3 = l[7];
518 uint64_t m0, m1, m2, m3, m4, m5;
520 uint64_t p0, p1, p2, p3;
525 c0 = l[0]; c1 = 0; c2 = 0;
552 c0 = m0; c1 = 0; c2 = 0;
593 const uint64_t *pb = b->
d;
594 __asm__ __volatile__(
596 "movq 0(%%rdi), %%r15\n"
597 "movq 8(%%rdi), %%rbx\n"
598 "movq 16(%%rdi), %%rcx\n"
599 "movq 0(%%rdx), %%r11\n"
600 "movq 8(%%rdx), %%r12\n"
601 "movq 16(%%rdx), %%r13\n"
602 "movq 24(%%rdx), %%r14\n"
604 "movq %%r15, %%rax\n"
607 "movq %%rax, 0(%%rsi)\n"
611 "xorq %%r10, %%r10\n"
613 "movq %%r15, %%rax\n"
619 "movq %%rbx, %%rax\n"
625 "movq %%r8, 8(%%rsi)\n"
628 "movq %%r15, %%rax\n"
631 "adcq %%rdx, %%r10\n"
634 "movq %%rbx, %%rax\n"
637 "adcq %%rdx, %%r10\n"
640 "movq %%rcx, %%rax\n"
643 "adcq %%rdx, %%r10\n"
646 "movq %%r9, 16(%%rsi)\n"
649 "movq %%r15, %%rax\n"
651 "addq %%rax, %%r10\n"
655 "movq 24(%%rdi), %%r15\n"
657 "movq %%rbx, %%rax\n"
659 "addq %%rax, %%r10\n"
663 "movq %%rcx, %%rax\n"
665 "addq %%rax, %%r10\n"
669 "movq %%r15, %%rax\n"
671 "addq %%rax, %%r10\n"
675 "movq %%r10, 24(%%rsi)\n"
676 "xorq %%r10, %%r10\n"
678 "movq %%rbx, %%rax\n"
684 "movq %%rcx, %%rax\n"
690 "movq %%r15, %%rax\n"
696 "movq %%r8, 32(%%rsi)\n"
699 "movq %%rcx, %%rax\n"
702 "adcq %%rdx, %%r10\n"
705 "movq %%r15, %%rax\n"
708 "adcq %%rdx, %%r10\n"
711 "movq %%r9, 40(%%rsi)\n"
713 "movq %%r15, %%rax\n"
715 "addq %%rax, %%r10\n"
718 "movq %%r10, 48(%%rsi)\n"
720 "movq %%r8, 56(%%rsi)\n"
723 :
"rax",
"rbx",
"rcx",
"r8",
"r9",
"r10",
"r11",
"r12",
"r13",
"r14",
"r15",
"cc",
"memory");
726 uint64_t c0 = 0, c1 = 0;
775 ret = r->
d[0] & ((1 << n) - 1);
776 r->
d[0] = (r->
d[0] >> n) + (r->
d[1] << (64 - n));
777 r->
d[1] = (r->
d[1] >> n) + (r->
d[2] << (64 - n));
778 r->
d[2] = (r->
d[2] >> n) + (r->
d[3] << (64 - n));
779 r->
d[3] = (r->
d[3] >> n);
795 return ((a->
d[0] ^ b->
d[0]) | (a->
d[1] ^ b->
d[1]) | (a->
d[2] ^ b->
d[2]) | (a->
d[3] ^ b->
d[3])) == 0;
800 unsigned int shiftlimbs;
801 unsigned int shiftlow;
802 unsigned int shifthigh;
805 shiftlimbs = shift >> 6;
806 shiftlow = shift & 0x3F;
807 shifthigh = 64 - shiftlow;
808 r->
d[0] = shift < 512 ? (l[0 + shiftlimbs] >> shiftlow | (shift < 448 && shiftlow ? (l[1 + shiftlimbs] << shifthigh) : 0)) : 0;
809 r->
d[1] = shift < 448 ? (l[1 + shiftlimbs] >> shiftlow | (shift < 384 && shiftlow ? (l[2 + shiftlimbs] << shifthigh) : 0)) : 0;
810 r->
d[2] = shift < 384 ? (l[2 + shiftlimbs] >> shiftlow | (shift < 320 && shiftlow ? (l[3 + shiftlimbs] << shifthigh) : 0)) : 0;
811 r->
d[3] = shift < 320 ? (l[3 + shiftlimbs] >> shiftlow) : 0;
816 uint64_t mask0, mask1;
817 volatile int vflag = flag;
819 mask0 = vflag + ~((uint64_t)0);
821 r->
d[0] = (r->
d[0] & mask0) | (a->
d[0] & mask1);
822 r->
d[1] = (r->
d[1] & mask0) | (a->
d[1] & mask1);
823 r->
d[2] = (r->
d[2] & mask0) | (a->
d[2] & mask1);
824 r->
d[3] = (r->
d[3] & mask0) | (a->
d[3] & mask1);
828 const uint64_t a0 = a->
v[0], a1 = a->
v[1], a2 = a->
v[2], a3 = a->
v[3], a4 = a->
v[4];
839 r->
d[0] = a0 | a1 << 62;
840 r->
d[1] = a1 >> 2 | a2 << 60;
841 r->
d[2] = a2 >> 4 | a3 << 58;
842 r->
d[3] = a3 >> 6 | a4 << 56;
850 const uint64_t M62 = UINT64_MAX >> 2;
851 const uint64_t a0 = a->
d[0], a1 = a->
d[1], a2 = a->
d[2], a3 = a->
d[3];
858 r->
v[1] = (a0 >> 62 | a1 << 2) & M62;
859 r->
v[2] = (a1 >> 60 | a2 << 4) & M62;
860 r->
v[3] = (a2 >> 58 | a3 << 6) & M62;
865 {{0x3FD25E8CD0364141LL, 0x2ABB739ABD2280EELL, -0x15LL, 0, 256}},
898 return !(a->
d[0] & 1);
#define SECP256K1_CHECKMEM_CHECK_VERIFY(p, len)
static SECP256K1_INLINE uint64_t secp256k1_u128_hi_u64(const secp256k1_uint128 *a)
static SECP256K1_INLINE void secp256k1_u128_from_u64(secp256k1_uint128 *r, uint64_t a)
static SECP256K1_INLINE void secp256k1_u128_rshift(secp256k1_uint128 *r, unsigned int n)
static SECP256K1_INLINE void secp256k1_u128_accum_u64(secp256k1_uint128 *r, uint64_t a)
static SECP256K1_INLINE void secp256k1_u128_accum_mul(secp256k1_uint128 *r, uint64_t a, uint64_t b)
static SECP256K1_INLINE uint64_t secp256k1_u128_to_u64(const secp256k1_uint128 *a)
static void secp256k1_modinv64(secp256k1_modinv64_signed62 *x, const secp256k1_modinv64_modinfo *modinfo)
static void secp256k1_modinv64_var(secp256k1_modinv64_signed62 *x, const secp256k1_modinv64_modinfo *modinfo)
static SECP256K1_INLINE int secp256k1_scalar_is_even(const secp256k1_scalar *a)
static SECP256K1_INLINE int secp256k1_scalar_check_overflow(const secp256k1_scalar *a)
static SECP256K1_INLINE void secp256k1_scalar_mul_shift_var(secp256k1_scalar *r, const secp256k1_scalar *a, const secp256k1_scalar *b, unsigned int shift)
static void secp256k1_scalar_split_128(secp256k1_scalar *r1, secp256k1_scalar *r2, const secp256k1_scalar *k)
static SECP256K1_INLINE unsigned int secp256k1_scalar_get_bits_var(const secp256k1_scalar *a, unsigned int offset, unsigned int count)
static SECP256K1_INLINE void secp256k1_scalar_clear(secp256k1_scalar *r)
#define extract(n)
Extract the lowest 64 bits of (c0,c1,c2) into n, and left shift the number 64 bits.
static void secp256k1_scalar_set_b32(secp256k1_scalar *r, const unsigned char *b32, int *overflow)
static void secp256k1_scalar_inverse_var(secp256k1_scalar *r, const secp256k1_scalar *x)
static const secp256k1_modinv64_modinfo secp256k1_const_modinfo_scalar
#define sumadd_fast(a)
Add a to the number defined by (c0,c1).
static void secp256k1_scalar_get_b32(unsigned char *bin, const secp256k1_scalar *a)
static void secp256k1_scalar_reduce_512(secp256k1_scalar *r, const uint64_t *l)
static void secp256k1_scalar_from_signed62(secp256k1_scalar *r, const secp256k1_modinv64_signed62 *a)
static SECP256K1_INLINE void secp256k1_scalar_set_int(secp256k1_scalar *r, unsigned int v)
static void secp256k1_scalar_mul_512(uint64_t l[8], const secp256k1_scalar *a, const secp256k1_scalar *b)
static void secp256k1_scalar_inverse(secp256k1_scalar *r, const secp256k1_scalar *x)
static SECP256K1_INLINE void secp256k1_scalar_cmov(secp256k1_scalar *r, const secp256k1_scalar *a, int flag)
#define extract_fast(n)
Extract the lowest 64 bits of (c0,c1,c2) into n, and left shift the number 64 bits.
#define muladd(a, b)
Add a*b to the number defined by (c0,c1,c2).
static void secp256k1_scalar_to_signed62(secp256k1_modinv64_signed62 *r, const secp256k1_scalar *a)
static SECP256K1_INLINE int secp256k1_scalar_eq(const secp256k1_scalar *a, const secp256k1_scalar *b)
static int secp256k1_scalar_add(secp256k1_scalar *r, const secp256k1_scalar *a, const secp256k1_scalar *b)
#define sumadd(a)
Add a to the number defined by (c0,c1,c2).
static int secp256k1_scalar_cond_negate(secp256k1_scalar *r, int flag)
static void secp256k1_scalar_mul(secp256k1_scalar *r, const secp256k1_scalar *a, const secp256k1_scalar *b)
static SECP256K1_INLINE int secp256k1_scalar_reduce(secp256k1_scalar *r, unsigned int overflow)
static void secp256k1_scalar_negate(secp256k1_scalar *r, const secp256k1_scalar *a)
static SECP256K1_INLINE int secp256k1_scalar_is_zero(const secp256k1_scalar *a)
static int secp256k1_scalar_is_high(const secp256k1_scalar *a)
static SECP256K1_INLINE unsigned int secp256k1_scalar_get_bits(const secp256k1_scalar *a, unsigned int offset, unsigned int count)
static void secp256k1_scalar_cadd_bit(secp256k1_scalar *r, unsigned int bit, int flag)
#define muladd_fast(a, b)
Add a*b to the number defined by (c0,c1).
static SECP256K1_INLINE int secp256k1_scalar_is_one(const secp256k1_scalar *a)
static int secp256k1_scalar_shr_int(secp256k1_scalar *r, int n)
#define VERIFY_CHECK(cond)
A scalar modulo the group order of the secp256k1 curve.